Our Technology

Enabling developers across the board to build and incorporate FPGA accelerators in record time and with no FPGA expertise requires a smart combination of technology ingredients to address the challenges of designing and deploying FPGAs. These technology components at the core of Accelize’s Solution are key to delivering customizable FPGA accelerated applications with superior agility and flexibility.

What Technology Experts Say About FPGA Programming

That is just horrible, much worse than programming software. Much more difficult to write. Much more difficult to get correct.

Jim Larus, Microsoft Azure

How do we get the performance of hardware with programmability of software?

We need to roll out Hardware as we do Software

Daniel Firestone, Microsoft Azure - OCP Summit 2016

Our Technology Brings The Software Programming Experience To FPGA

Key Technology Enablers

The underlying KPN streaming dataflow model mathematically guarantees functional equivalence between software model execution and FPGA hardware execution.

The patent-pending, un-typed, un-sized C++  streaming API completely abstracts data movements in and out of the FPGA and inside the FPGA fabric.

The built-in proprietary High-Level Synthesis engine enables seamless integration of C modules while providing the perfect balance between time-to-design and QoR.

QuickPlay leverages the industry-standard Eclipse IDE and utilizes Linux gcc, g++, and gdb for FPGA system modeling and debug.

Designs are implemented remotely and transparently, in a secured Cloud environment that hosts vendor-specific FPGA design tools.

The native development framework Includes base building blocks for common I/O and memory interfaces, as well as advanced data stream and packet management.

Every data stream is instrumented in hardware enabling real-life datasets to be replayed in the software model and providing a 360 degree insight into the generated hardware.

Key Technology Enablers

IP is securely hosted in the Cloud and is never downloaded by end-users, even during design implementation, providing ultimate protection for IP vendors.

 

Leveraging open protocols and formats such as AMBA AXI4 and IP-XACT to standardize IP formatting and deliverables allows seamless integration in QuickStore and guarantees interoperability in QuickPlay.

Our runtime license mechanism leverages the FPGA’s DNA to control and restrict IP usage per device and therefore enable pay-per-use of IP with attractive pricing.

Standardizes and simplifies the licensing of high-value IP to provide a hassle-free evaluation and purchase experience for both users and IP vendors.

Merchant website with https-secured online transactions ensure user data confidentiality and security for purchases.

IP rights management provides users and IP vendors with real time insight about IP usage.

 

Technology Partners

Algodone is key partner for Accelize. Algodone has developed a unique hardware DRM technology that fuels the novel runtime monetization offered by QuickAlliance partners through QuickStore. With Algodone embedded DRM, accelerators and IPs are purchased on a pay-per-use model with no upfront cost.

Intel® FPGAs can be used to accelerate the performance of large-scale data systems. Intel FPGAs enable higher speed data processing by providing customized high-bandwidth, low-latency connections to network and storage systems. Accelize technology fully supports leading FPGAs from Intel.

Xilinx is the leading provider of All Programmable FPGAs. Xilinx uniquely enables applications that are both software defined, yet hardware optimized – powering industry advancements in Cloud Computing, SDN/NFV, Video/Vision, Industrial IoT and 5G Wireless. Accelize technology fully supports leading FPGAs from Xilinx.

 

 

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